A board respin is not an inconvenience, it is a calendar event. Fabrication takes five to fifteen working days, assembly adds another five, long-lead parts may have to be re-ordered, and the engineering time to find the fault, fix it, and re-release runs 20 to 60 hours. One avoidable respin on a moderately complex board costs $6,000 to $20,000 and three to six weeks of schedule.

Against that, a day in a circuit simulator is cheap — if it is spent where simulation actually tells you something. Simulation has a mixed reputation among hardware teams because it gets applied uniformly across a whole schematic, where most of it confirms what the designer already knew, and skipped on exactly the two or three subcircuits where analytical intuition fails.

What the Tools Are

SPICE is the underlying engine: a numerical solver that finds node voltages and branch currents by iterating on the nonlinear device equations. Every practical tool is a SPICE variant with a schematic front end.

LTspice is free, fast, robust at converging, and stocked with one vendor's power parts plus generic models. It remains the default for analog and power work. Simulink and PLECS operate a level up, modeling control loops with idealized switches rather than transistor physics — what you want when the question is loop stability rather than switching loss. Vendor web simulators attached to a specific regulator family are worth ten minutes because they encode the manufacturer's application knowledge, and worth nothing outside that family. None costs money at the entry level; the cost of simulation is engineering hours and the discipline to model the right thing.

Where Simulation Genuinely Earns the Time

Switching power supplies

This is the highest-yield use, without close competition. A buck or boost converter has a control loop whose stability depends on the compensation network, the output capacitor's ESR, the inductor, and the load. Getting phase margin wrong produces a supply that looks fine at steady state and rings on a load step — days to diagnose on hardware, minutes to see in simulation. Sweep the loop response, the startup transient with real soft-start, the load step, and both input extremes. Topology choice is a separate question, covered in DC-DC converter versus LDO.

Analog signal chains

Filters, instrumentation amplifiers, and sensor front ends where gain, bandwidth, noise, and offset must be known before committing. An AC sweep gives the filter's real response with actual part tolerances rather than the ideal one on paper, and a noise analysis tells you whether your 16-bit ADC will see 16 bits or 11.

Worst-case and Monte Carlo analysis

The most underused feature in every simulator. Assign tolerances to every passive, run 500 iterations, and look at the distribution. A threshold set by two 1 percent resistors and a reference with 2 percent initial accuracy has a spread you can compute by hand once and cannot for a chain of six. This is the analysis that predicts field returns rather than prototype behavior.

Protection and transient circuits

Inrush limiting, reverse-polarity protection, hot-swap, load dump, and inductive kickback are all cases where you want the peak voltage and clamp energy before you find out. Simulation gives a number for the TVS clamping and the FET's safe operating area margin, complementing the rules in ESD protection in circuit design. RMS current from the same transient run feeds capacitor ripple ratings and MOSFET dissipation, and from there life expectancy.

What Simulation Will Never Catch

This list matters more than the previous one, because the failures it describes are the ones that actually cause respins.

  • Layout parasitics. Trace inductance, ground bounce, return path discontinuities, and net-to-net coupling do not exist in a schematic-level simulation. A perfectly simulated buck converter with a 25 mm switching loop still rings badly.
  • EMI and radiated emissions. Simulation says nothing useful about whether you pass at a test lab. That is a layout and shielding outcome.
  • Model quality. Your simulation is exactly as good as its models, and vendor SPICE models frequently omit parasitic capacitance, temperature behavior, or protection structures. A result resting on one vendor model deserves suspicion.
  • Thermal coupling on the real board. Copper spreading, airflow, and neighboring hot parts are a 3D problem, not a netlist problem.
  • Mechanical and assembly reality — connector strain, a footprint error, a part fitted backwards — shows up at board bring-up, and no simulation prevents the classic errors in first PCB design mistakes.
  • Firmware interaction. A rail that browns out because the MCU enabled a peripheral in the wrong order is a system behavior, not a circuit behavior.

A Proportionate Workflow

Simulate selectively and time-box it. A workable sequence on a typical mixed-signal board:

  1. Identify the two or three subcircuits where you cannot predict the answer analytically — usually a power stage, an analog front end, and one protection circuit.
  2. Model each in isolation with realistic source impedance and load, not an ideal voltage source into a resistor.
  3. Run the sweeps that correspond to real operating extremes: minimum and maximum supply, cold and hot, no load and full load, plus a Monte Carlo pass on anything whose accuracy is specified.
  4. Record the results in the design file so the next engineer knows why the compensation values are what they are, then stop. Do not simulate the parts of the board you understand.

Two to four days on a first-revision board is a reasonable budget, spent before layout starts rather than after, while the component values are still free to change.

Simulation and Prototypes Are Not Substitutes

Simulation reduces the number of hardware iterations, not the need for them. Plan for two board revisions on a new design regardless, and treat a third as the outcome simulation exists to prevent. Low-volume board cost is small next to the engineering time around it, as PCB prototype cost shows, so the case for simulation is about schedule, not board price.

The same logic applies on the mechanical side, where finite element analysis plays exactly the role SPICE plays here, with the same caveats about model quality — a parallel drawn out in FEA simulation in product design and in the broader question of simulation versus a physical prototype.

Deciding What to Simulate on Your Board

Projects House applies simulation where it changes decisions and skips it where it does not — power stages, analog chains, protection, and tolerance analysis, then straight into layout. Send your schematic scope and your schedule constraints through the contact form.