Almost Every First Board Fails the Same Six Ways

A first PCB spin rarely fails in an interesting way. It fails because a footprint was wrong, a ground return had nowhere to go, a regulator had no local capacitance, nobody could probe anything, the design rules did not match the fab's process, or the panel edge ate a connector. Each costs one spin: roughly $200 to $900 in boards and stencil for a small assembly, plus 2 to 4 weeks. Two spins is normal for a new design; five is a schedule disaster, and it is almost always these six items compounding.

1. Footprints Nobody Verified

Wrong footprints are the leading cause of a dead first board. The library part came from a vendor site or the CAD tool's built-in library, and nobody checked it against the datasheet drawing.

Common failure modes: pin 1 rotated 90 degrees, a QFN thermal pad the wrong size so the part floats, a connector mirrored so it mounts on the wrong side, and drill holes 0.004 in (0.1 mm) too small for a through-hole part's leads. The verification routine takes an hour and saves a spin:

  • Open the datasheet's recommended land pattern beside the library footprint and compare pad sizes, pitch, and pin 1 location number by number.
  • Print the layout at 1:1 on paper and set the physical components on top of it. Connectors and crystals reveal themselves immediately.
  • Check courtyard and height against neighboring parts and the enclosure. A tall electrolytic under a housing rib is a rework job on every unit.
  • Confirm the assembler can source the exact part number you drew. A substitute in a different package is a footprint mismatch by another name.

2. A Ground Plane With Holes Cut Through It

Above a few hundred kilohertz, current returns directly under its outgoing trace. If a signal crosses a split or slot in the ground plane, the return has to detour around the gap, creating a loop that radiates and picks up noise. That is the mechanism behind a large share of first-board EMC failures.

Practical rules: keep one continuous ground plane on a dedicated layer and do not route signals through it. Two-layer boards make this nearly impossible on anything with a fast clock, a strong argument for four layers, framed in how many PCB layers your product needs. Resist splitting ground into analog and digital islands unless a mixed-signal datasheet tells you to; the split usually creates the problem it was meant to solve.

Add stitching vias along board edges and near any layer transition on a fast signal. When there is a radio on the board, the rules tighten considerably, as described in RF PCB design.

3. Decoupling Capacitors Missing or Too Far Away

A microcontroller draws current in nanosecond bursts as its gates switch. The regulator, several inches away with trace inductance in between, cannot supply that; the local ceramic capacitor does. Without it the rail collapses briefly on each switching edge, producing random resets, ADC noise, and communication errors that appear only under load.

Place a 100 nF ceramic at every power pin, on the same side as the part, with the shortest possible connection and its own via to ground. Distance matters more than quantity: a capacitor 0.4 in (10 mm) away contributes little. Add 1 to 10 uF of bulk near each supply entry point and near high-current loads.

Follow the datasheet's power layout section rather than guessing. Switching regulators have a hot loop, the path through the input capacitor and switching node, that must be kept physically small, and most datasheets include a recommended layout drawing worth copying exactly. Choosing the regulator topology is covered in DC-DC converter vs LDO.

4. No Way to Debug the Board

The board arrives, does not enumerate, and there is nowhere to attach a probe: no test points, no debug header, no way to isolate one supply rail. The engineer ends up scraping solder mask off traces with a hobby knife. Design in the access before you need it:

  • A test point on every power rail and on ground, spread across the board so a scope ground lead can be short.
  • A debug header, SWD or JTAG, with a standard pinout, kept on the production board rather than removed for cost. It costs cents and it is how field units get diagnosed.
  • A serial console on unused UART pins, brought to a header.
  • Zero-ohm jumpers in series with each supply, so a rail can be isolated to find the short.
  • Labeled silkscreen on every test point and connector.

Access designed for bring-up is the same access used by production test later, so it pays twice, as explained in production test fixtures. The bring-up sequence itself, and how to avoid destroying the board on first power-up, is in PCB bring-up.

5. Design Rules That Do Not Match the Fab

The CAD tool ships with default rules that have nothing to do with your manufacturer. A layout routed at 0.004 in trace and space with 0.006 in drills passes the internal check, then draws a surcharge, a long lead time, or a rejection at a shop whose standard process is 0.005 in and 0.008 in.

Get the fab's capability sheet before routing and enter its numbers into the DRC: minimum trace and space, minimum drill and annular ring, copper-to-edge clearance, solder mask sliver and dam widths, and the layer stack with its dielectric thicknesses. For controlled impedance, ask the fab for the stack-up and trace widths that hit your target rather than calculating against assumed values.

The cost consequences are nonlinear: dropping below a shop's standard process class can double the board price, a large fraction of the totals in PCB prototype cost. Confirm the assembler's constraints too, since component spacing and paste aperture rules differ, and those tradeoffs are part of SMT vs through-hole assembly.

6. Panelization, Edges, and Protection Left to Last

The board is designed as a rectangle floating in space, and then reality intervenes. Assembly needs 0.12 to 0.2 in (3 to 5 mm) of clear rail on two edges for the conveyor, with no components in that zone. Fiducials, usually three per board, let the pick-and-place align. V-scoring or mouse-bite tabs need planning so depaneling does not crack a nearby ceramic capacitor.

Two more items belong in this review. Connectors facing the outside world need series resistance and TVS diodes on every accessible line, because a user will eventually touch them, for the reasons in ESD protection in circuit design. And check the board against the actual enclosure model: mounting holes, connector heights against housing cutouts, and clearance under tall parts. A board that is electrically perfect and 0.04 in too wide is still a re-spin.

Get a Board Reviewed Before You Order It

Projects House reviews first-spin PCB layouts against footprints, power integrity, return paths, test access, and fab capability, and returns a marked-up list of what to fix before the order goes out. Send your schematic and layout files through our contact form.